Transistors, gates, and a diamond CPU
You will be able to
- Explain an enhancement/depletion inverter and its static power
- Relate stage delay to a ring-oscillator period
- Trace a program through the DIA-4 processor
2 · Play
Lower the driver-to-load ratio until the ring oscillator stops. Then open the Diamond CPU, load 'subroutines', and step until the output port shows 10. Which instruction wrote it?
Open the lab →3 · ComputeOpen notebook in Colab
The same physics in Python. Run it in your browser with Colab, or locally after pip install -e .
from adamas.logic import Fet, inverter_vtc, noise_margins vin, vout = inverter_vtc(Fet(vth=1.5, w_um=200), Fet(vth=-2.0, w_um=25), vdd=10.0) print(noise_margins(vin, vout)) from adamas import digital print(round(digital.EDGate().t_pd_s * 1e9, 2), 'ns per stage (hand model)')
4 · Check